Move modules/gzip to gitea.com/macaron/gzip (#9058)
* Move modules/gzip to gitea.com/macaron/gzip * Fix vendor
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54 changed files with 2972 additions and 5163 deletions
24
vendor/github.com/klauspost/cpuid/.gitignore
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vendor/github.com/klauspost/cpuid/.gitignore
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# Compiled Object files, Static and Dynamic libs (Shared Objects)
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*.o
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*.a
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*.so
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# Folders
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_obj
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_test
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# Architecture specific extensions/prefixes
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*.[568vq]
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[568vq].out
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*.cgo1.go
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*.cgo2.c
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_cgo_defun.c
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_cgo_gotypes.go
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_cgo_export.*
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_testmain.go
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*.exe
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*.test
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*.prof
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vendor/github.com/klauspost/cpuid/.travis.yml
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language: go
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go:
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- 1.3
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- 1.4
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- 1.5
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- 1.6
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- tip
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22
vendor/github.com/klauspost/cpuid/LICENSE
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vendor/github.com/klauspost/cpuid/LICENSE
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The MIT License (MIT)
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Copyright (c) 2015 Klaus Post
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in all
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copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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145
vendor/github.com/klauspost/cpuid/README.md
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# cpuid
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Package cpuid provides information about the CPU running the current program.
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CPU features are detected on startup, and kept for fast access through the life of the application.
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Currently x86 / x64 (AMD64) is supported, and no external C (cgo) code is used, which should make the library very easy to use.
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You can access the CPU information by accessing the shared CPU variable of the cpuid library.
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Package home: https://github.com/klauspost/cpuid
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[![GoDoc][1]][2] [![Build Status][3]][4]
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[1]: https://godoc.org/github.com/klauspost/cpuid?status.svg
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[2]: https://godoc.org/github.com/klauspost/cpuid
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[3]: https://travis-ci.org/klauspost/cpuid.svg
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[4]: https://travis-ci.org/klauspost/cpuid
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# features
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## CPU Instructions
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* **CMOV** (i686 CMOV)
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* **NX** (NX (No-Execute) bit)
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* **AMD3DNOW** (AMD 3DNOW)
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* **AMD3DNOWEXT** (AMD 3DNowExt)
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* **MMX** (standard MMX)
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* **MMXEXT** (SSE integer functions or AMD MMX ext)
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* **SSE** (SSE functions)
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* **SSE2** (P4 SSE functions)
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* **SSE3** (Prescott SSE3 functions)
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* **SSSE3** (Conroe SSSE3 functions)
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* **SSE4** (Penryn SSE4.1 functions)
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* **SSE4A** (AMD Barcelona microarchitecture SSE4a instructions)
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* **SSE42** (Nehalem SSE4.2 functions)
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* **AVX** (AVX functions)
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* **AVX2** (AVX2 functions)
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* **FMA3** (Intel FMA 3)
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* **FMA4** (Bulldozer FMA4 functions)
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* **XOP** (Bulldozer XOP functions)
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* **F16C** (Half-precision floating-point conversion)
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* **BMI1** (Bit Manipulation Instruction Set 1)
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* **BMI2** (Bit Manipulation Instruction Set 2)
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* **TBM** (AMD Trailing Bit Manipulation)
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* **LZCNT** (LZCNT instruction)
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* **POPCNT** (POPCNT instruction)
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* **AESNI** (Advanced Encryption Standard New Instructions)
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* **CLMUL** (Carry-less Multiplication)
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* **HTT** (Hyperthreading (enabled))
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* **HLE** (Hardware Lock Elision)
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* **RTM** (Restricted Transactional Memory)
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* **RDRAND** (RDRAND instruction is available)
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* **RDSEED** (RDSEED instruction is available)
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* **ADX** (Intel ADX (Multi-Precision Add-Carry Instruction Extensions))
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* **SHA** (Intel SHA Extensions)
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* **AVX512F** (AVX-512 Foundation)
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* **AVX512DQ** (AVX-512 Doubleword and Quadword Instructions)
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* **AVX512IFMA** (AVX-512 Integer Fused Multiply-Add Instructions)
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* **AVX512PF** (AVX-512 Prefetch Instructions)
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* **AVX512ER** (AVX-512 Exponential and Reciprocal Instructions)
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* **AVX512CD** (AVX-512 Conflict Detection Instructions)
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* **AVX512BW** (AVX-512 Byte and Word Instructions)
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* **AVX512VL** (AVX-512 Vector Length Extensions)
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* **AVX512VBMI** (AVX-512 Vector Bit Manipulation Instructions)
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* **MPX** (Intel MPX (Memory Protection Extensions))
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* **ERMS** (Enhanced REP MOVSB/STOSB)
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* **RDTSCP** (RDTSCP Instruction)
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* **CX16** (CMPXCHG16B Instruction)
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* **SGX** (Software Guard Extensions, with activation details)
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## Performance
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* **RDTSCP()** Returns current cycle count. Can be used for benchmarking.
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* **SSE2SLOW** (SSE2 is supported, but usually not faster)
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* **SSE3SLOW** (SSE3 is supported, but usually not faster)
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* **ATOM** (Atom processor, some SSSE3 instructions are slower)
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* **Cache line** (Probable size of a cache line).
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* **L1, L2, L3 Cache size** on newer Intel/AMD CPUs.
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## Cpu Vendor/VM
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* **Intel**
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* **AMD**
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* **VIA**
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* **Transmeta**
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* **NSC**
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* **KVM** (Kernel-based Virtual Machine)
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* **MSVM** (Microsoft Hyper-V or Windows Virtual PC)
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* **VMware**
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* **XenHVM**
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# installing
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```go get github.com/klauspost/cpuid```
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# example
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```Go
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package main
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import (
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"fmt"
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"github.com/klauspost/cpuid"
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)
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func main() {
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// Print basic CPU information:
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fmt.Println("Name:", cpuid.CPU.BrandName)
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fmt.Println("PhysicalCores:", cpuid.CPU.PhysicalCores)
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fmt.Println("ThreadsPerCore:", cpuid.CPU.ThreadsPerCore)
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fmt.Println("LogicalCores:", cpuid.CPU.LogicalCores)
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fmt.Println("Family", cpuid.CPU.Family, "Model:", cpuid.CPU.Model)
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fmt.Println("Features:", cpuid.CPU.Features)
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fmt.Println("Cacheline bytes:", cpuid.CPU.CacheLine)
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fmt.Println("L1 Data Cache:", cpuid.CPU.Cache.L1D, "bytes")
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fmt.Println("L1 Instruction Cache:", cpuid.CPU.Cache.L1D, "bytes")
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fmt.Println("L2 Cache:", cpuid.CPU.Cache.L2, "bytes")
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fmt.Println("L3 Cache:", cpuid.CPU.Cache.L3, "bytes")
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// Test if we have a specific feature:
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if cpuid.CPU.SSE() {
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fmt.Println("We have Streaming SIMD Extensions")
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}
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}
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```
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Sample output:
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```
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>go run main.go
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Name: Intel(R) Core(TM) i5-2540M CPU @ 2.60GHz
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PhysicalCores: 2
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ThreadsPerCore: 2
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LogicalCores: 4
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Family 6 Model: 42
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Features: CMOV,MMX,MMXEXT,SSE,SSE2,SSE3,SSSE3,SSE4.1,SSE4.2,AVX,AESNI,CLMUL
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Cacheline bytes: 64
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We have Streaming SIMD Extensions
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```
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# private package
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In the "private" folder you can find an autogenerated version of the library you can include in your own packages.
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For this purpose all exports are removed, and functions and constants are lowercased.
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This is not a recommended way of using the library, but provided for convenience, if it is difficult for you to use external packages.
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# license
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This code is published under an MIT license. See LICENSE file for more information.
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1022
vendor/github.com/klauspost/cpuid/cpuid.go
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1022
vendor/github.com/klauspost/cpuid/cpuid.go
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Load diff
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vendor/github.com/klauspost/cpuid/cpuid_386.s
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// Copyright (c) 2015 Klaus Post, released under MIT License. See LICENSE file.
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// +build 386,!gccgo
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// func asmCpuid(op uint32) (eax, ebx, ecx, edx uint32)
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TEXT ·asmCpuid(SB), 7, $0
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XORL CX, CX
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MOVL op+0(FP), AX
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CPUID
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MOVL AX, eax+4(FP)
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MOVL BX, ebx+8(FP)
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MOVL CX, ecx+12(FP)
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MOVL DX, edx+16(FP)
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RET
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// func asmCpuidex(op, op2 uint32) (eax, ebx, ecx, edx uint32)
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TEXT ·asmCpuidex(SB), 7, $0
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MOVL op+0(FP), AX
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MOVL op2+4(FP), CX
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CPUID
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MOVL AX, eax+8(FP)
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MOVL BX, ebx+12(FP)
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MOVL CX, ecx+16(FP)
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MOVL DX, edx+20(FP)
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RET
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// func xgetbv(index uint32) (eax, edx uint32)
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TEXT ·asmXgetbv(SB), 7, $0
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MOVL index+0(FP), CX
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BYTE $0x0f; BYTE $0x01; BYTE $0xd0 // XGETBV
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MOVL AX, eax+4(FP)
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MOVL DX, edx+8(FP)
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RET
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// func asmRdtscpAsm() (eax, ebx, ecx, edx uint32)
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TEXT ·asmRdtscpAsm(SB), 7, $0
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BYTE $0x0F; BYTE $0x01; BYTE $0xF9 // RDTSCP
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MOVL AX, eax+0(FP)
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MOVL BX, ebx+4(FP)
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MOVL CX, ecx+8(FP)
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MOVL DX, edx+12(FP)
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RET
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vendor/github.com/klauspost/cpuid/cpuid_amd64.s
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// Copyright (c) 2015 Klaus Post, released under MIT License. See LICENSE file.
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//+build amd64,!gccgo
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// func asmCpuid(op uint32) (eax, ebx, ecx, edx uint32)
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TEXT ·asmCpuid(SB), 7, $0
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XORQ CX, CX
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MOVL op+0(FP), AX
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CPUID
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MOVL AX, eax+8(FP)
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MOVL BX, ebx+12(FP)
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MOVL CX, ecx+16(FP)
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MOVL DX, edx+20(FP)
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RET
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// func asmCpuidex(op, op2 uint32) (eax, ebx, ecx, edx uint32)
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TEXT ·asmCpuidex(SB), 7, $0
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MOVL op+0(FP), AX
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MOVL op2+4(FP), CX
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CPUID
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MOVL AX, eax+8(FP)
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MOVL BX, ebx+12(FP)
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MOVL CX, ecx+16(FP)
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MOVL DX, edx+20(FP)
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RET
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// func asmXgetbv(index uint32) (eax, edx uint32)
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TEXT ·asmXgetbv(SB), 7, $0
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MOVL index+0(FP), CX
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BYTE $0x0f; BYTE $0x01; BYTE $0xd0 // XGETBV
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MOVL AX, eax+8(FP)
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MOVL DX, edx+12(FP)
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RET
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// func asmRdtscpAsm() (eax, ebx, ecx, edx uint32)
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TEXT ·asmRdtscpAsm(SB), 7, $0
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BYTE $0x0F; BYTE $0x01; BYTE $0xF9 // RDTSCP
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MOVL AX, eax+0(FP)
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MOVL BX, ebx+4(FP)
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MOVL CX, ecx+8(FP)
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MOVL DX, edx+12(FP)
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RET
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vendor/github.com/klauspost/cpuid/detect_intel.go
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// Copyright (c) 2015 Klaus Post, released under MIT License. See LICENSE file.
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// +build 386,!gccgo amd64,!gccgo
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package cpuid
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func asmCpuid(op uint32) (eax, ebx, ecx, edx uint32)
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func asmCpuidex(op, op2 uint32) (eax, ebx, ecx, edx uint32)
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func asmXgetbv(index uint32) (eax, edx uint32)
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func asmRdtscpAsm() (eax, ebx, ecx, edx uint32)
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func initCPU() {
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cpuid = asmCpuid
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cpuidex = asmCpuidex
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xgetbv = asmXgetbv
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rdtscpAsm = asmRdtscpAsm
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}
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vendor/github.com/klauspost/cpuid/detect_ref.go
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// Copyright (c) 2015 Klaus Post, released under MIT License. See LICENSE file.
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// +build !amd64,!386 gccgo
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package cpuid
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func initCPU() {
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cpuid = func(op uint32) (eax, ebx, ecx, edx uint32) {
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return 0, 0, 0, 0
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}
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cpuidex = func(op, op2 uint32) (eax, ebx, ecx, edx uint32) {
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return 0, 0, 0, 0
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}
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xgetbv = func(index uint32) (eax, edx uint32) {
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return 0, 0
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}
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rdtscpAsm = func() (eax, ebx, ecx, edx uint32) {
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return 0, 0, 0, 0
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}
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}
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3
vendor/github.com/klauspost/cpuid/generate.go
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package cpuid
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//go:generate go run private-gen.go
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Loading…
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Reference in a new issue